This relates generally to imaging systems and, more particularly, to stacked-die image sensors with split-pixel architecture.
Modern electronic devices such as cellular telephones, cameras, and computers often use digital image sensors. Imager sensors (sometimes referred to as imagers) may be formed from a two-dimensional array of image sensing pixels. Each pixel includes a photosensitive layer that receives incident photons (light) and converts the photons into electrical signals. Image sensors are sometimes designed to provide images to electronic devices using a Joint Photographic Experts Group (JPEG) format.
As electronic devices become smaller, more electronic devices are using “stacked” image sensors in which multiple integrated circuit wafers (or multiple individual die) are stacked on top of one another. Conductive interconnects that include metal wires, pads or vias are used to electrically connect the circuitry in one die to the circuitry in another die.
In conventional stacked-die image sensors, parasitic capacitive coupling may occur between adjacent conductive interconnects, thereby causing electrical crosstalk. This type of electrical crosstalk between adjacent pixels may lead to image artifacts and degraded image quality.
It would therefore be desirable to provide improved conductive interconnect arrangements for stacked-die image sensors.